CIHB=CIHB_0, RTR=RTR_0, SDOFF=SDOFF_0, CDPL=CDPL_0, HCKOFF=HCKOFF_0, DLSL=DATA0, PEROFF=PEROFF_0, CINST=CINST_0, IPGOFF=IPGOFF_0, BWEN=BWEN_0, WPSPL=WPSPL_0, CDIHB=CDIHB_0, TSCD=TSCD_0, BREN=BREN_0, RTA=RTA_0, DLA=DLA_0, SDSTB=SDSTB_0, WTA=WTA_0
Present State
| CIHB | Command Inhibit (CMD) 0 (CIHB_0): Can issue command using only CMD line 1 (CIHB_1): Cannot issue command |
| CDIHB | Command Inhibit (DATA) 0 (CDIHB_0): Can issue command which uses the DATA line 1 (CDIHB_1): Cannot issue command which uses the DATA line |
| DLA | Data Line Active 0 (DLA_0): DATA Line Inactive 1 (DLA_1): DATA Line Active |
| SDSTB | SD Clock Stable 0 (SDSTB_0): Clock is changing frequency and not stable. 1 (SDSTB_1): Clock is stable. |
| IPGOFF | IPG_CLK Gated Off Internally 0 (IPGOFF_0): IPG_CLK is active. 1 (IPGOFF_1): IPG_CLK is gated off. |
| HCKOFF | HCLK Gated Off Internally 0 (HCKOFF_0): HCLK is active. 1 (HCKOFF_1): HCLK is gated off. |
| PEROFF | IPG_PERCLK Gated Off Internally 0 (PEROFF_0): IPG_PERCLK is active. 1 (PEROFF_1): IPG_PERCLK is gated off. |
| SDOFF | SD Clock Gated Off Internally 0 (SDOFF_0): SD Clock is active. 1 (SDOFF_1): SD Clock is gated off. |
| WTA | Write Transfer Active 0 (WTA_0): No valid data 1 (WTA_1): Transferring data |
| RTA | Read Transfer Active 0 (RTA_0): No valid data 1 (RTA_1): Transferring data |
| BWEN | Buffer Write Enable 0 (BWEN_0): Write disable 1 (BWEN_1): Write enable |
| BREN | Buffer Read Enable 0 (BREN_0): Read disable 1 (BREN_1): Read enable |
| RTR | Re-Tuning Request (only for SD3.0 SDR104 mode and EMMC HS200 mode) 0 (RTR_0): Fixed or well tuned sampling clock 1 (RTR_1): Sampling clock needs re-tuning |
| TSCD | Tape Select Change Done 0 (TSCD_0): Delay cell select change is not finished. 1 (TSCD_1): Delay cell select change is finished. |
| CINST | Card Inserted 0 (CINST_0): Power on Reset or No Card 1 (CINST_1): Card Inserted |
| CDPL | Card Detect Pin Level 0 (CDPL_0): No card present (CD_B = 1) 1 (CDPL_1): Card present (CD_B = 0) |
| WPSPL | Write Protect Switch Pin Level 0 (WPSPL_0): Write protected (WP = 1) 1 (WPSPL_1): Write enabled (WP = 0) |
| CLSL | CMD Line Signal Level |
| DLSL | DATA[7:0] Line Signal Level 0 (DATA0): Data 0 line signal level 1 (DATA1): Data 1 line signal level 2 (DATA2): Data 2 line signal level 3 (DATA3): Data 3 line signal level 4 (DATA4): Data 4 line signal level 5 (DATA5): Data 5 line signal level 6 (DATA6): Data 6 line signal level 7 (DATA7): Data 7 line signal level |